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IPPS
2010
IEEE
13 years 5 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
IPPS
2006
IEEE
14 years 1 months ago
Parallel implementation and performance characterization of MUSCLE
Multiple sequence alignment is a fundamental and very computationally intensive task in molecular biology. MUSCLE, a new algorithm for creating multiple alignments of protein sequ...
Xi Deng, Eric Li, Jiulong Shan, Wenguang Chen
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
13 years 5 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
TPDS
2008
113views more  TPDS 2008»
13 years 7 months ago
Evaluating a High-Level Parallel Language (GpH) for Computational GRIDs
Computational Grids potentially offer low cost, readily available, and large-scale high-performance platforms. For the parallel execution of programs, however, computational GRIDs ...
Abdallah Al Zain, Philip W. Trinder, Greg Michaels...
ICCSA
2003
Springer
14 years 24 days ago
Parallel CLUSTAL W for PC Clusters
This paper presents a parallel version of CLUSTAL W, called pCLUSTAL. In contrast to the commercial SGI parallel Clustal, which requires an expensive shared memory SGI multiprocess...
James Cheetham, Frank K. H. A. Dehne, Sylvain Pitr...