2057 search results - page 37 / 412 » Scalable and Structured Scheduling |
ISCC
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms. In contrast to traditional switching archit...
SIGCOMM
2004
ACM
14 years 1 months ago
2004
ACM
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...
BSDCON
2003
13 years 9 months ago
2003
The existing thread scheduler in FreeBSD was well suited towards the computing environment that it was developed in. As the priorities and hardware targets of the project have cha...
ISCAS
1994
IEEE
13 years 11 months ago
1994
IEEE
FIR ( nite impulse response) lters are widely used in digital signal processing. In this paper new architectures for high speed FIR lters with programmable coe cients are presente...
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...