860 search results - page 141 / 172 » Scaling Up Software Architecture Evaluation Processes |
IJCNN
2000
IEEE
14 years 3 days ago
2000
IEEE
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
FCCM
2008
IEEE
13 years 7 months ago
2008
IEEE
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
EMSOFT
2007
Springer
13 years 11 months ago
2007
Springer
This paper deals with energy-aware real-time system scheduling using dynamic voltage scaling (DVS) for energy-constrained embedded systems that execute variable and unpredictable ...
ISPASS
2003
IEEE
14 years 1 months ago
2003
IEEE
Emerging application domains such as interactive vision, animation, and multimedia collaboration display dynamic scalable parallelism, and high computational requirements, making ...
DCC
2007
IEEE
14 years 7 months ago
2007
IEEE
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...