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» Scaling Up Software Architecture Evaluation Processes
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ARCS
2005
Springer
14 years 1 months ago
Energy Management for Embedded Multithreaded Processors with Integrated EDF Scheduling
Abstract. This paper proposes a new hardware-based energy management technique for future embedded multithreaded processors with integrated Earliest Deadline First (EDF) real-time ...
Sascha Uhrig, Theo Ungerer
CASES
2006
ACM
14 years 1 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
HPDC
2008
IEEE
14 years 2 months ago
StoreGPU: exploiting graphics processing units to accelerate distributed storage systems
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
Samer Al-Kiswany, Abdullah Gharaibeh, Elizeu Santo...
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
13 years 11 months ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
IROS
2009
IEEE
198views Robotics» more  IROS 2009»
14 years 2 months ago
Scalable learning for object detection with GPU hardware
Abstract— We consider the problem of robotic object detection of such objects as mugs, cups, and staplers in indoor environments. While object detection has made significant pro...
Adam Coates, Paul Baumstarck, Quoc V. Le, Andrew Y...