1263 search results - page 210 / 253 » Scatter-Add in Data Parallel Architectures |
ISLPED
2000
ACM
14 years 6 days ago
2000
ACM
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
PPOPP
2009
ACM
14 years 8 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
ISCA
2010
IEEE
14 years 28 days ago
2010
IEEE
Recent advances in computing have led to an explosion in the amount of data being generated. Processing the ever-growing data in a timely manner has made throughput computing an i...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...