1263 search results - page 232 / 253 » Scatter-Add in Data Parallel Architectures |
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
We propose methods for reducing the energy consumed by snoop requests in snoopy bus-based symmetric multiprocessor (SMP) systems. Observing that a large fraction of snoops do not ...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
ASPLOS
2009
ACM
14 years 2 months ago
2009
ACM
This paper presents a performance analysis of an accelerated 2-D rigid image registration implementation that employs the Compute Unified Device Architecture (CUDA) programming e...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...