Sciweavers

30 search results - page 5 / 6
» Schedulability-Driven Communication Synthesis for Time Trigg...
Sort
View
EMSOFT
2007
Springer
14 years 5 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 4 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
ASPDAC
2008
ACM
94views Hardware» more  ASPDAC 2008»
14 years 26 days ago
Robust on-chip bus architecture synthesis for MPSoCs under random tasks arrival
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
Sujan Pandey, Rolf Drechsler
CODES
2007
IEEE
14 years 5 months ago
Improved response time analysis of tasks scheduled under preemptive Round-Robin
Round-Robin scheduling is the most popular time triggered scheduling policy, and has been widely used in communication networks for the last decades. It is an efficient schedulin...
Razvan Racu, Li Li, Rafik Henia, Arne Hamann, Rolf...
CASES
2010
ACM
13 years 9 months ago
Low cost multicast authentication via validity voting in time-triggered embedded control networks
Wired embedded networks must include multicast authentication to prevent masquerade attacks within the network. However, unique constraints for these networks make most existing m...
Christopher Szilagyi, Philip Koopman