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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
14 years 19 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ASPDAC
2007
ACM
102views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
Chuan Lin, Hai Zhou
ICCAD
2003
IEEE
134views Hardware» more  ICCAD 2003»
14 years 4 months ago
Multi-Domain Clock Skew Scheduling
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...
Kaushik Ravindran, Andreas Kuehlmann, Ellen Sentov...
ICSE
2008
IEEE-ACM
14 years 8 months ago
Debugging reinvented: asking and answering why and why not questions about program behavior
When software developers want to understand the reason for a program's behavior, they must translate their questions about the behavior into a series of questions about code,...
Andrew Jensen Ko, Brad A. Myers
AAAI
2010
13 years 8 months ago
Task Space Behavior Learning for Humanoid Robots using Gaussian Mixture Models
In this paper a system was developed for robot behavior acquisition using kinesthetic demonstrations. It enables a humanoid robot to imitate constrained reaching gestures directed...
Kaushik Subramanian