123 search results - page 17 / 25 » Scheduling for power reduction in a real-time system |
ICCAD
2009
IEEE
13 years 4 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
IISWC
2008
IEEE
14 years 1 months ago
2008
IEEE
Heterogeneous multi-core processors are attractive for power efficient computing because of their ability to meet varied resource requirements of diverse applications in a workloa...
ICPR
2008
IEEE
14 years 1 months ago
2008
IEEE
An intrusion detection system (IDS) detects illegal manipulations of computer systems. In intrusion detection systems, feature reduction, including feature extraction and feature ...
ISLPED
2003
ACM
13 years 12 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
WH
2010
13 years 1 months ago
2010
In this work, we consider low power, wearable pulse oximeter sensors for ambulatory, remote vital signs monitoring applications. It is extremely important for such sensors to main...