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WORDS
2002
IEEE
14 years 19 days ago
A Static Timing Analysis Environment Using Java Architecture for Safety Critical Real-Time Systems
Certainly, in hard real-time systems, it is reasonable to argue that no hard real-time threads should behave in an unpredictable way and that schedulability should be guaranteed b...
Erik Yu-Shing Hu, Guillem Bernat, Andy J. Wellings
DAC
2001
ACM
14 years 8 months ago
Battery-Aware Static Scheduling for Distributed Real-Time Embedded Systems
This paper addresses battery-aware static scheduling in batterypowered distributed real-time embedded systems. As suggested by previous work, reducing the discharge current level ...
Jiong Luo, Niraj K. Jha
CASES
2009
ACM
14 years 2 months ago
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times
Embedded processors have become increasingly complex, resulting in variable execution behavior and reduced timing predictability. On such processors, safe timing specifications e...
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Ta...
EUROMICRO
2000
IEEE
14 years 4 days ago
Task Assignment and Scheduling under Memory Constraints
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
Radoslaw Szymanek, Krzysztof Kuchcinski
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 8 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh