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IPPS
2010
IEEE
13 years 5 months ago
Dynamic analysis of the relay cache-coherence protocol for distributed transactional memory
Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...
Bo Zhang, Binoy Ravindran
CODES
2011
IEEE
12 years 7 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
ISCA
2005
IEEE
101views Hardware» more  ISCA 2005»
14 years 1 months ago
Virtualizing Transactional Memory
Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, ...
Ravi Rajwar, Maurice Herlihy, Konrad K. Lai
ISAAC
2009
Springer
114views Algorithms» more  ISAAC 2009»
14 years 2 months ago
Good Programming in Transactional Memory
Abstract. In a multicore transactional memory (TM) system, concurrent execution threads interact and interfere with each other through shared memory. The less interference a progra...
Raphael Eidenbenz, Roger Wattenhofer
IEEEHPCS
2010
13 years 6 months ago
Transactional Memory: How to perform load adaption in a simple and distributed manner
We analyze and present different strategies to adapt the load in transactional memory systems based on contention. Our experimental results show a substantial overall improvement ...
David Hasenfratz, Johannes Schneider, Roger Watten...