Abstract— In this paper, we present several techniques for lowpower design, including a descriptor-based low-power scheduling algorithm, design of dynamic voltage generator, and ...
In this paper, an approach to symbolic model checking of process networks is introduced. It is based on interval decision diagrams (IDDs), a representation of multi-valued functio...
Abstract The Examination Timetabling problem regards the scheduling for the exams of a set of university courses, avoiding the overlapping of exams having students in common, fairl...
For software executing several threads in parallel, testing is unreliable, as it cannot cover all thread schedules. Model checking, however, can cover all possible thread interlea...
High density memory is becoming more important as many execution streams are consolidated onto single chip many-core processors. DRAM is ubiquitous as a main memory technology, but...
Jeffrey Stuecheli, Dimitris Kaseridis, Hillery C. ...