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DSD
2006
IEEE
83views Hardware» more  DSD 2006»
13 years 11 months ago
Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication
Abstract. Network-on-chip-based multiprocessor systems-onchip are considered as future embedded systems platforms. One of the steps in mapping an application onto such a parallel p...
Sander Stuijk, Twan Basten, Marc Geilen, Amir Hoss...
CODES
1997
IEEE
13 years 12 months ago
Optimizing communication in embedded system co-simulation
The Pia hardware-software co-simulator provides substantial speedups over traditional co-simulation methods by permitting dynamic changes in the level of detail when simulating co...
Ken Hines, Gaetano Borriello
DSD
2011
IEEE
194views Hardware» more  DSD 2011»
12 years 7 months ago
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...
ECRTS
2000
IEEE
14 years 3 days ago
Early-release fair scheduling
We present a variant of Pfair scheduling, which we call early-release fair (ERfair) scheduling. Like conventional Pfair scheduling, ERfair scheduling algorithms can be applied to ...
James H. Anderson, Anand Srinivasan
ISSS
2000
IEEE
191views Hardware» more  ISSS 2000»
13 years 11 months ago
Conditional Scheduling for Embedded Systems using Genetic List Scheduling
One important part of a HW/SW codesign system is the scheduler which is needed in order to determine if a given HW/SW partitioning is suitable for a given application. In this pap...
Martin Grajcar