Sciweavers

325 search results - page 43 / 65
» Secure Configuration of Field Programmable Gate Arrays
Sort
View
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
CCECE
2006
IEEE
14 years 1 months ago
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time
— The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1...
Rachid Beguenane, Jean-Gabriel Mailloux, Sté...
FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
14 years 1 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
ISCAS
2006
IEEE
85views Hardware» more  ISCAS 2006»
14 years 1 months ago
Analog frequency response measurement in mixed-signal systems
—We present an efficient approach for on-chip frequency response measurement, including phase and gain, of analog circuitry in mixed-signal systems. The approach uses direct digi...
Charles E. Stroud, Dayu Yang, Foster F. Dai
MOMM
2006
ACM
122views Communications» more  MOMM 2006»
14 years 1 months ago
Multimedia Tools for Teaching Reconfigurable Systems
Multimedia tools provide significant assistance in vast variety of different areas and one of them is education. The paper shows that such tools are especially important for const...
Valery Sklyarov, Iouliia Skliarova