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» Secure FPGA circuits using controlled placement and routing
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FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
14 years 26 days ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Interconnect capacitance estimation for FPGAs
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Jason Helge Anderson, Farid N. Najm
HOST
2008
IEEE
14 years 3 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...
DAC
2003
ACM
14 years 1 months ago
Force directed mongrel with physical net constraints
This paper describes a new force directed global placement algorithm that exploits and extends techniques from two leading placers, Force-directed [12] [26] and Mongrel [22]. It c...
Sung-Woo Hur, Tung Cao, Karthik Rajagopal, Yegna P...
FPGA
2012
ACM
300views FPGA» more  FPGA 2012»
12 years 4 months ago
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi ...