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VTS
2005
IEEE
116views Hardware» more  VTS 2005»
14 years 3 months ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
DAC
1996
ACM
14 years 2 months ago
Delay Minimal Decomposition of Multiplexers in Technology Mapping
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
ATAL
1995
Springer
14 years 1 months ago
Time, Knowledge, and Choice
Abstract. This article considers the link between theory and practice in agentoriented programming. We begin by rigorously defining a new formal specification language for autono...
Michael Wooldridge
ESORICS
2002
Springer
14 years 9 months ago
Outbound Authentication for Programmable Secure Coprocessors
A programmable secure coprocessor platform can help solve many security problems in distributed computing. However, these solutions usually require that coprocessor applications be...
Sean W. Smith
CCS
2010
ACM
14 years 5 months ago
Effective trust management through a hybrid logical and relational approach
Despite a plethora of recent research regarding trust management approaches to authorization, relatively little attention has been given to exactly how these technologies can be e...
Adam J. Lee, Ting Yu, Yann Le Gall