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CASES
2001
ACM
13 years 11 months ago
Pattern matching in reconfigurable logic for packet classification
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...
Adam Johnson, Kenneth Mackenzie
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
13 years 11 months ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
LOPSTR
2004
Springer
14 years 29 days ago
On the Semantics of Logic Program Composition
Abstract. This paper aims at offering an insightful synthesis of different compositional semantics for logic program composition which have been developed in the literature. In p...
Antonio Brogi
ICCAD
1997
IEEE
97views Hardware» more  ICCAD 1997»
13 years 11 months ago
Low power logic synthesis for XOR based circuits
An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
Unni Narayanan, C. L. Liu
GLVLSI
2005
IEEE
97views VLSI» more  GLVLSI 2005»
14 years 1 months ago
On equivalence checking and logic synthesis of circuits with a common specification
In this paper we develop a theory of equivalence checking (EC) and logic synthesis of circuits with a common specification (CS). We show that two combinational circuits N1, N2 have...
Eugene Goldberg