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113
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CVPR
2010
IEEE
15 years 7 months ago
Weakly-Supervised Hashing in Kernel Space
The explosive growth of the vision data motivates the recent studies on efficient data indexing methods such as locality-sensitive hashing (LSH). Most existing approaches perform...
Yadong Mu, Jialie Shen, Shuicheng Yan
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
15 years 7 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
15 years 7 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit
PADS
2003
ACM
15 years 7 months ago
Parallel Network Simulation under Distributed Genesis
We describe two major developments in the General Network Simulation Integration System (Genesis): the support for BGP protocol in large network simulations and distribution of th...
Boleslaw K. Szymanski, Yu Liu, Rashim Gupta
137
Voted
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 7 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...