Sciweavers

34 search results - page 6 / 7
» Selected failure mechanisms of modern power modules
Sort
View
IPPS
2006
IEEE
14 years 3 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
ICS
2005
Tsinghua U.
14 years 2 months ago
Power-aware resource allocation in high-end systems via online simulation
Traditionally, scheduling in high-end parallel systems focuses on how to minimize the average job waiting time and on how to maximize the overall system utilization. Despite the d...
Barry Lawson, Evgenia Smirni
VLDB
1998
ACM
170views Database» more  VLDB 1998»
13 years 8 months ago
Advanced Data Processing in KRISYS: Modeling Concepts, Implementation Techniques, and Client/Server Issues
The increasing power of modern computers steadily opens up new application domains for advanced data processing such as engineering and knowledge-based applications. To meet their...
Stefan Deßloch, Theo Härder, Nelson Men...
ISPASS
2009
IEEE
14 years 3 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...
DAC
2003
ACM
14 years 10 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...