Sciweavers

12 search results - page 2 / 3
» Selection policy-induced reduction mappings for Boolean netw...
Sort
View
VLSISP
2002
114views more  VLSISP 2002»
13 years 10 months ago
Image processing using cellular neural networks based on multi-valued and universal binary neurons
Multi-valued and universal binary neurons (MVN and UBN) are the neural processing elements with the complex-valued weights and high functionality. It is possible to implement an a...
Igor N. Aizenberg, Constantine Butakoff
CODES
2002
IEEE
14 years 3 months ago
Communication speed selection for embedded systems with networked voltage-scalable processors
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
PIMRC
2008
IEEE
14 years 5 months ago
Throughput optimization for multipath unicast routing under probabilistic jamming
Abstract—We present a framework for throughput optimization for multipath unicast routing in wireless networks in the presence of probabilistic jamming. The framework introduces ...
Patrick Tague, Sidharth Nabar, James A. Ritcey, Da...
FPGA
2009
ACM
180views FPGA» more  FPGA 2009»
14 years 5 months ago
Scalable don't-care-based logic optimization and resynthesis
We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
TCAD
1998
126views more  TCAD 1998»
13 years 10 months ago
Iterative remapping for logic circuits
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
Luca Benini, Patrick Vuillod, Giovanni De Micheli