—We study the effect of the controller on the testability of sequential circuits composed of controllers and data paths. We show that even when all the loops of the circuit have ...
This paper presents an optimized fault diagnosing procedure applicable in Built-in Self-Test environments. Instead of the known approach based on a simple bisection of patterns in...
Raimund Ubar, Sergei Kostin, Jaan Raik, Teet Evart...
This work proposes an approach to generate weighted random patterns which can maximally excite a circuit during its burn-in testing. The approach is based on a probability model a...
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signicant area overhead and performance degradation...
We present in this paper a method for implementing moment functions in a CMOS retina for shape recognition applications. The method is based on the use of binary patterns and it a...
Olivier Aubreton, Lew Fock Chong Lew Yan Voon, Guy...