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VLSID
2003
IEEE
96views VLSI» more  VLSID 2003»
14 years 8 months ago
Design Of A Universal BIST (UBIST) Structure
This paper introduces a Built-In Self Test (BIST) structure referred to as Universal BIST (UBIST). The Test Pattern Generator (TPG) of the proposed UBIST is designed to generate an...
Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Pari...
DATE
2006
IEEE
99views Hardware» more  DATE 2006»
14 years 1 months ago
Multiple-fault diagnosis based on single-fault activation and single-output observation
In this paper, we propose a new circuit transformation technique in conjunction with the use of a special diagnostic test pattern, named SO-SLAT pattern, to achieve higher multipl...
Yung-Chieh Lin, Kwang-Ting Cheng
EH
1999
IEEE
169views Hardware» more  EH 1999»
13 years 12 months ago
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices
GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EXTM and XC4000XLTM devices. Unlike other FPGA architectures popular with Evolutionary Hardware rese...
Delon Levi, Steve Guccione
JCNS
2010
121views more  JCNS 2010»
13 years 2 months ago
Pattern orthogonalization via channel decorrelation by adaptive networks
The early processing of sensory information by neuronal circuits often includes a reshaping of activity patterns that may facilitate the further processing of stimulus representat...
Stuart D. Wick, Martin T. Wiechert, Rainer W. Frie...
DAC
1994
ACM
13 years 11 months ago
Error Diagnosis for Transistor-Level Verification
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...