605 search results - page 21 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
DATE
2003
IEEE
14 years 20 days ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
ASAP
2003
IEEE
14 years 20 days ago
2003
IEEE
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
CF
2011
ACM
12 years 7 months ago
2011
ACM
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
IEEEPACT
2000
IEEE
13 years 11 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
ISCA
1989
IEEE
13 years 11 months ago
1989
IEEE
: We explore the question: “What can a von Neumann processor borrow from dataflow to make it more suitable for a multiprocessor?’’ Starting with a simple, “RISC-like” ins...