605 search results - page 22 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
MICRO
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Dynamic languages such as Javascript are the de-facto standard for web applications. However, generating efficient code for dynamically-typed languages is a challenge, because it...
TCAD
2002
13 years 7 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
GECCO
2004
Springer
14 years 23 days ago
2004
Springer
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...