605 search results - page 5 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
ARC
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. In this paper we present a framework for the automatic identification and selection of convex MIMO instruction-set extensions for reconfigurable architecture. The framewo...
ASAP
2006
IEEE
14 years 1 months ago
2006
IEEE
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
