171 search results - page 29 / 35 » Sensitivity analysis in decision circuits |
ISVLSI
2008
IEEE
14 years 3 months ago
2008
IEEE
In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and ban...
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
VLSID
1997
IEEE
14 years 1 months ago
1997
IEEE
Cascode CMOS op-amps use a large number of external bias voltages. This results in numerous drawbacks, namely, an area and power overhead, susceptiblity of the bias lines to noise...
CORR
2000
Springer
13 years 9 months ago
2000
Springer
In real-world environments it usually is difficult to specify target operating conditions precisely, for example, target misclassification costs. This uncertainty makes building ro...
ISLPED
2010
ACM
13 years 9 months ago
2010
ACM
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...