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» Sensitivity analysis in decision circuits
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GLVLSI
2006
IEEE
120views VLSI» more  GLVLSI 2006»
14 years 3 months ago
Sensitivity evaluation of global resonant H-tree clock distribution networks
A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
Jonathan Rosenfeld, Eby G. Friedman
SAS
2004
Springer
140views Formal Methods» more  SAS 2004»
14 years 2 months ago
Path-Sensitive Analysis for Linear Arithmetic and Uninterpreted Functions
We describe data structures and algorithms for performing a path-sensitive program analysis to discover equivalences of expressions involving linear arithmetic or uninterpreted fun...
Sumit Gulwani, George C. Necula
DAC
2004
ACM
14 years 2 months ago
Hierarchical approach to exact symbolic analysis of large analog circuits
—This paper proposes a novel approach to the exact symbolic analysis of very large analog circuits. The new method is based on determinant decision diagrams (DDDs) representing s...
Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
DATE
2007
IEEE
154views Hardware» more  DATE 2007»
14 years 3 months ago
Soft error rate analysis for sequential circuits
Due to reduction in device feature size and supply voltage, the sensitivity to radiation induced transient faults (soft errors) of digital systems increases dramatically. Intensiv...
Natasa Miskov-Zivanov, Diana Marculescu
ATS
2000
IEEE
149views Hardware» more  ATS 2000»
14 years 1 months ago
Charge sharing fault analysis and testing for CMOS domino logic circuits
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...
Ching-Hwa Cheng, Wen-Ben Jone, Jinn-Shyan Wang, Sh...