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» Sequential Circuits for Relational Analysis
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DATE
2010
IEEE
168views Hardware» more  DATE 2010»
14 years 2 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 2 months ago
Statistical static timing analysis using Markov chain Monte Carlo
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
Yashodhan Kanoria, Subhasish Mitra, Andrea Montana...
ASPDAC
2007
ACM
144views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method
With semiconductor fabrication technologies scaled below 100 nm, the design-manufacturing interface becomes more and more complicated. The resultant process variability causes a nu...
Alexander V. Mitev, Michael Marefat, Dongsheng Ma,...
CNSM
2010
13 years 7 months ago
Joint analysis of network incidents and intradomain routing changes
Abstract--This paper studies how intradomain routing instability relates to events in network trouble tickets for two networks: a VPN provider and the Internet2 backbone network. O...
Amelie Medem Kuatse, Renata Teixeira, Nick Feamste...
VTS
2003
IEEE
122views Hardware» more  VTS 2003»
14 years 2 months ago
A Reconfigurable Shared Scan-in Architecture
In this paper, an efficient technique for test data volume reduction based on the shared scan-in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) arc...
Samitha Samaranayake, Emil Gizdarski, Nodari Sitch...