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DATE
2009
IEEE
135views Hardware» more  DATE 2009»
15 years 9 months ago
Gate replacement techniques for simultaneous leakage and aging optimization
—1As technology scales, the aging effect caused by Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. On the other hand, r...
Yu Wang 0002, Xiaoming Chen, Wenping Wang, Yu Cao,...
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
15 years 8 months ago
Gate planning during placement for gated clock network
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
NOCS
2008
IEEE
15 years 8 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
MOBIQUITOUS
2007
IEEE
15 years 8 months ago
Optimal Relay Node Fault Recovery
—Topology control problems are concerned with the assignment of power levels to the nodes of an ad-hoc network so as to maintain a specified network topology while minimizing th...
Fei Che, Liang Zhao, Errol L. Lloyd
ESCIENCE
2006
IEEE
15 years 8 months ago
WISENT: e-Science for Energy Meteorology
Our energy production increasingly depends on renewable energy sources, which impose new challenges for distributed and decentralized systems. One problem is that the availability...
Wilhelm Hasselbring, Detlev Heinemann, Johannes Hu...