In this paper, we discuss a library generator for parallel sorting routines that examines the input characteristics (and the parameters they affect) to select the best performing ...
Brian A. Garber, Daniel Hoeflinger, Xiaoming Li, M...
Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in sharedmemory multiprocessors. These directories use specialpurpose caches of poin...
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are share...
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
We consider handheld computing devices which are connected to a server (or a powerful desktop machine) via a wireless LAN. On such devices, it is often possible to save the energy...