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DATE
2003
IEEE
154views Hardware» more  DATE 2003»
14 years 2 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
HPCA
2006
IEEE
14 years 9 months ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
OTM
2009
Springer
14 years 3 months ago
TMBean: Optimistic Concurrency in Application Servers Using Transactional Memory
Abstract. In this experience report, we present an evaluation of different techniques to manage concurrency in the context of application servers. Traditionally, using entity beans...
Lucas Charles, Pascal Felber, Christophe Gêt...
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 2 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
IJPP
2002
107views more  IJPP 2002»
13 years 8 months ago
Efficiently Adapting Java Binaries in Limited Memory Contexts
This paper presents a compilation framework that allows executable code to be shared across different Java Virtual Machine (JVM) instances. All fully compliant JVMs that target se...
Pramod G. Joisha, Samuel P. Midkiff, Mauricio J. S...