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» Signature Verification Using Static and Dynamic Features
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DAC
2003
ACM
14 years 8 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
ICSE
2008
IEEE-ACM
14 years 8 months ago
Precise memory leak detection for java software using container profiling
A memory leak in a Java program occurs when object references that are no longer needed are unnecessarily maintained. Such leaks are difficult to understand because static analyse...
Guoqing Xu, Atanas Rountev
ARCS
2006
Springer
13 years 11 months ago
Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro
Today's FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial...
Christopher Claus, Florian Helmut Müller, Wal...
AADEBUG
2005
Springer
14 years 1 months ago
Tdb: a source-level debugger for dynamically translated programs
Debugging techniques have evolved over the years in response to changes in programming languages, implementation techniques, and user needs. A new type of implementation vehicle f...
Naveen Kumar, Bruce R. Childers, Mary Lou Soffa
DATE
2008
IEEE
167views Hardware» more  DATE 2008»
14 years 2 months ago
Accuracy-Adaptive Simulation of Transaction Level Models
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
Martin Radetzki, Rauf Salimi Khaligh