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ESA
2007
Springer
140views Algorithms» more  ESA 2007»
14 years 2 months ago
On Minimum Power Connectivity Problems
Given a (directed or undirected) graph with edge costs, the power of a node is the maximum cost of an edge leaving it, and the power of the graph is the sum of the powers of its n...
Yuval Lando, Zeev Nutov
ICCAD
1998
IEEE
80views Hardware» more  ICCAD 1998»
14 years 26 days ago
On the optimization power of retiming and resynthesis transformations
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...
Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, R...
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 1 months ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
TAGT
1994
Springer
185views Graph Theory» more  TAGT 1994»
14 years 20 days ago
Concatenation of Graphs
An operation of concatenation is introduced for graphs. Then strings are viewed as expressions denoting graphs, and string languages are interpreted as graph languages. For a clas...
Joost Engelfriet, Jan Joris Vereijken
DAC
2009
ACM
14 years 9 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...