48 search results - page 7 / 10 » Simplifying concurrent algorithms by exploiting hardware tra... |
CIDR
2009
13 years 9 months ago
2009
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
ASPLOS
2010
ACM
14 years 3 months ago
2010
ACM
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
ASPLOS
2008
ACM
13 years 10 months ago
2008
ACM
Standard concurrency control mechanisms offer a trade-off: Transactional memory approaches maximize concurrency, but suffer high overheads and cost for retrying in the case of act...
FPGA
2000
ACM
14 years 4 days ago
2000
ACM
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...