Sciweavers

657 search results - page 108 / 132
» Simulating Student Programmers
Sort
View
DAC
2004
ACM
14 years 9 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
14 years 8 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
14 years 8 months ago
Power-aware Multimedia Systems using Run-time Prediction
The need for low-power multimedia processing is integral to portable and embedded devices such as cell phones, wireless terminals, multimedia handhelds and PDAs. The multimedia pr...
Pavan Kumar, Mani B. Srivastava
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
14 years 5 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
ICC
2009
IEEE
129views Communications» more  ICC 2009»
14 years 3 months ago
Random Access Protocols for WLANs Based on Mechanism Design
— In wireless local area networks (WLANs), quality of service (QoS) can be provided by mapping applications with different requirements (e.g., delay and throughput) into one of t...
Man Hon Cheung, Amir Hamed Mohsenian Rad, Vincent ...