In this paper, we present simulation techniques to estimate the worst-case voltage variation using a RC model for the power distribution network. Pattern independent maximum envel...
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...