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RV
2010
Springer
171views Hardware» more  RV 2010»
15 years 3 days ago
Runtime Verification for Software Transactional Memories
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
Vasu Singh
VTS
2006
IEEE
101views Hardware» more  VTS 2006»
15 years 8 months ago
Design Optimization for Robustness to Single Event Upsets
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram
159
Voted
JSAC
2010
146views more  JSAC 2010»
14 years 9 months ago
NLOS identification and mitigation for localization based on UWB experimental data
Abstract--Sensor networks can benefit greatly from locationawareness, since it allows information gathered by the sensors to be tied to their physical locations. Ultra-wide bandwid...
Stefano Maranò, Wesley M. Gifford, Henk Wym...
CASES
2003
ACM
15 years 5 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
CHARME
2001
Springer
107views Hardware» more  CHARME 2001»
15 years 5 months ago
Using Combinatorial Optimization Methods for Quantification Scheduling
Model checking is the process of verifying whether a model of a concurrent system satisfies a specified temporal property. Symbolic algorithms based on Binary Decision Diagrams (BD...
Pankaj Chauhan, Edmund M. Clarke, Somesh Jha, Jame...