943 search results - page 26 / 189 » Simulation based deadlock analysis for system level designs |
E2EMON
2006
IEEE
13 years 11 months ago
2006
IEEE
Analyzing Internet traffic at packet level involves generally large amounts of raw data, derived data, and results from various analysis tasks. In addition, the analysis often proc...
APPT
2007
Springer
14 years 1 months ago
2007
Springer
The memory size limits the scalability of virtual machine systems. There have been some researches about sharing identical pages among guest systems to reduce memory usage. However...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
DSD
2007
IEEE
14 years 1 months ago
2007
IEEE
Developing highly efficient and reliable embedded systems demands hardware/software (HW/SW) co-design and, therefore, co-simulation. In order to be highly configurable, embedded...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Architectural simulation has achieved a prominent role in the system design cycle by providing designers the ability to quickly examine a wide variety of design choices. However, ...