943 search results - page 39 / 189 » Simulation based deadlock analysis for system level designs |
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
ICSE
2009
IEEE-ACM
14 years 3 months ago
2009
IEEE-ACM
Adaptation is of utmost importance in systems developed by assembling reusable software services accessed through their public interfaces. This process aims at solving, as automat...
ICCAD
1995
IEEE
14 years 11 days ago
1995
IEEE
This paper addresses the problem of speeding up functional (delayindependent)logic simulation for synchronousdigital systems. The problem needs very little new motivation – cycl...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper addresses the problem of efficient functional simulation of synchronous digital systems. A technique based on the use of Decision Diagrams (DD) for representing the fun...