943 search results - page 95 / 189 » Simulation based deadlock analysis for system level designs |
TCAD
2002
13 years 8 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
INTERACT
2003
13 years 10 months ago
2003
: This paper reports on current development of usability heuristics for large screen information exhibits. By basing the creation of such heuristics on real systems, and identifyin...
CCS
2009
ACM
14 years 29 days ago
2009
ACM
We present an approach for the design and analysis of an electronic voting machine based on a novel combination of formal verification and systematic testing. The system was desig...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...