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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 3 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
MS
2003
13 years 11 months ago
Potential for Symbolic-assisted Process Simulation
This paper explores the potential of acausal modelling tools for a simple, but challenging process engineering benchmark problem. Matlab/Simulink illustrates a traditional block d...
Christian Haag, David I. Wilson
SSS
2009
Springer
14 years 4 months ago
Visiting Gafni's Reduction Land: From the BG Simulation to the Extended BG Simulation
: The Borowsky-Gafni (BG) simulation algorithm is a powerful tool that allows a set of t + 1 asynchronous sequential processes to wait-free simulate (i.e., despite the crash of up ...
Damien Imbs, Michel Raynal
DATE
2007
IEEE
157views Hardware» more  DATE 2007»
14 years 4 months ago
Energy evaluation of software implementations of block ciphers under memory constraints
Software implementations of modern block ciphers often require large lookup tables along with code size increasing optimizations like loop unrolling to reach peak performance on g...
Johann Großschädl, Stefan Tillich, Chri...
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 10 months ago
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van...