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ISLPED
2004
ACM
102views Hardware» more  ISLPED 2004»
14 years 4 months ago
Microarchitectural power modeling techniques for deep sub-micron microprocessors
The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance h...
Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M...
MICRO
2008
IEEE
138views Hardware» more  MICRO 2008»
14 years 5 months ago
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
Xi E. Chen, Tor M. Aamodt
INFOCOM
2000
IEEE
14 years 3 months ago
Quantifying the Benefit of Configurability in Circuit-Switched WDM Ring Networks
—In a reconfigurable network, lightpath connections can be dynamically changed to reflect changes in traffic conditions. This paper characterizes the gain in traffic capacity tha...
Brett Schein, Eytan Modiano
ICIP
2004
IEEE
15 years 24 days ago
An implemented architecture of deblocking filter for H.264/AVC
H.264/AVC is a new international standard for the compression of natural video images, in which a deblocking filter has been adopted to remove blocking artifacts. In this paper, w...
Bin Sheng, Wen Gao, Di Wu
HPCA
2005
IEEE
14 years 11 months ago
A Unified Compressed Memory Hierarchy
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
Erik G. Hallnor, Steven K. Reinhardt