Sciweavers

12032 search results - page 68 / 2407
» Simulation of Manufacturing Systems
Sort
View
ICCAD
2008
IEEE
103views Hardware» more  ICCAD 2008»
15 years 11 months ago
Hardware protection and authentication through netlist level obfuscation
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
Rajat Subhra Chakraborty, Swarup Bhunia
99
Voted
DAC
2001
ACM
16 years 3 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey
150
Voted
ESTIMEDIA
2003
Springer
15 years 7 months ago
EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration
— The constant increase in levels of integration and the reduction of the time-to-market have led to the definition of new methodologies stressing reuse. This involves not only ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
128
Voted
CDES
2008
90views Hardware» more  CDES 2008»
15 years 4 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
99
Voted
ACISICIS
2008
IEEE
15 years 9 months ago
An Integer Linear Programming Approach for Dedicated Machine Constraint
Dedicated machine constraint is one of the new challenges introduced in photolithography machinery of the semiconductor manufacturing system due to natural bias. Previous research...
Huy Nguyen Anh Pham, Arthur M. D. Shr, Peter P. Ch...