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DAC
2005
ACM
13 years 9 months ago
Simulation of the effects of timing jitter in track-and-hold and sample-and-hold circuits
In this paper, we analyze the effect of jitter in track and hold circuits. The output spectrum is obtained in terms of the system function of the track and hold. It is a fairly g...
V. Vasudevan
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
13 years 11 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert
IJFCS
2008
102views more  IJFCS 2008»
13 years 7 months ago
Gene Assembly Models and Boolean Circuits
We propose two different ways to simulate Boolean circuits in the framework of ciliate computations, based on the intramolecular and on the intermolecular gene assembly models wit...
Tseren-Onolt Ishdorj, Ion Petre
VTS
2000
IEEE
84views Hardware» more  VTS 2000»
13 years 12 months ago
ESIM: A Multimodel Design Error and Fault Simulator for Logic Circuits
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
Hussain Al-Asaad, John P. Hayes
DATE
1998
IEEE
107views Hardware» more  DATE 1998»
13 years 11 months ago
Efficient DC Fault Simulation of Nonlinear Analog Circuits
Efficient dc fault simulation of nonlinear analog circuits is addressed in this paper. Two techniques, one-step relaxation and adaptive simulation continuation, are proposed. By on...
Michael W. Tian, C.-J. Richard Shi