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DAC
2009
ACM
14 years 10 months ago
The day Sherlock Holmes decided to do EDA
Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and...
Andreas G. Veneris, Sean Safarpour
DAC
2008
ACM
14 years 10 months ago
Enhancing timing-driven FPGA placement for pipelined netlists
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
Kenneth Eguro, Scott Hauck
DAC
2004
ACM
14 years 10 months ago
Automated design of operational transconductance amplifiers using reversed geometric programming
We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-conve...
Johan P. Vanderhaegen, Robert W. Brodersen
DAC
2005
ACM
14 years 10 months ago
Structure preserving reduction of frequency-dependent interconnect
A rational Arnoldi method for passivity-preserving model-order reduction (MOR) with implicit multi-point moment matching for systems with frequency-dependent interconnects is desc...
Quming Zhou, Kartik Mohanram, Athanasios C. Antoul...
ICCD
2004
IEEE
129views Hardware» more  ICCD 2004»
14 years 5 months ago
Cache Array Architecture Optimization at Deep Submicron Technologies
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutma...