1304 search results - page 218 / 261 » Simulation of Soliton Circuits |
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Predictive delay analysis is presented for a representative CMOS inverter with submicron device size using PREDICTMOS MOSFET model. As against SPICE, which adopts a time consuming...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...
ICCD
2005
IEEE
14 years 5 months ago
2005
IEEE
: Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications. Operand isolation schemes are adopted to reduce...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...