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ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
13 years 11 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
DATE
1997
IEEE
107views Hardware» more  DATE 1997»
13 years 11 months ago
Exploiting temporal independence in distributed preemptive circuit simulation
In digital circuit simulation hidden opportunities for concurrent execution of models often exist, arising from the propagation delay associated with the generation of output even...
Peter Walker, Sumit Ghosh
ISQED
2007
IEEE
116views Hardware» more  ISQED 2007»
14 years 1 months ago
MEMESTAR: A Simulation Framework for Reliability Evaluation over Multiple Environments
We present a methodology for the simulation of soft errors targeting future nano-technological devices. This approach efficiently scales the failure rate of individual devices ac...
Christian J. Hescott, Drew C. Ness, David J. Lilja
LATIN
2010
Springer
14 years 2 months ago
The Size and Depth of Layered Boolean Circuits
We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In ...
Anna Gál, Jing-Tang Jang
ASPDAC
2008
ACM
135views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Analog circuit simulation using range arithmetics
The impact of parameter variations in integrated analog circuits is usually analyzed by Monte Carlo methods with a high number of simulation runs. Few approaches based on interval ...
Darius Grabowski, Markus Olbrich, Erich Barke