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DAC
1999
ACM
13 years 11 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...
DAC
1997
ACM
13 years 11 months ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
DAC
1997
ACM
13 years 11 months ago
SPIE: Sparse Partial Inductance Extraction
Extracting the inductance of complex interconnect topologies is a formidable task, and simulating the resulting dense partial inductance matrix is even more difficult. Furthermore...
Zhijiang He, Mustafa Celik, Lawrence T. Pileggi
DAC
2009
ACM
14 years 2 months ago
Yield-driven iterative robust circuit optimization algorithm
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
Yan Li, Vladimir Stojanovic
JTRES
2010
ACM
13 years 7 months ago
WCET driven design space exploration of an object cache
In order to guarantee that real-time systems meet their timing specification, static execution time bounds need to be calculated. Not considering execution time predictability led...
Benedikt Huber, Wolfgang Puffitsch, Martin Schoebe...