Transient faults are expected a be a major design consideration in future microprocessors. Recent proposals for transient fault detection in processor cores have revolved around t...
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
Thomas F. Wenisch, Roland E. Wunderlich, Babak Fal...
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
The floating point portion of the SPEC CPU suite and the HPC Challenge suite are widely recognized and utilized as benchmarks that represent scientific application behavior. In th...
Because the inductive noise Ldi/dt is induced by the power change and can have disastrous impact on the timing and reliability of the system, high-performance CPU designs are more ...
Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O....