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FDL
2007
IEEE
14 years 3 months ago
APDL: A Processor Description Language For Design Space Exploration of Embedded Processors
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, ...
ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
14 years 2 months ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
ICRA
2005
IEEE
145views Robotics» more  ICRA 2005»
14 years 2 months ago
A Criterion for the PassivitY of Haptic Devices
— Rendering a stiff virtual wall remains a core challenge in the field of haptics. A passivity study of this problem is presented, which relates the maximum achievable wall stif...
Nicola Diolaiti, Günter Niemeyer, Federico Ba...
ISLPED
2004
ACM
153views Hardware» more  ISLPED 2004»
14 years 2 months ago
Any-time probabilistic switching model using bayesian networks
Modeling and estimation of switching activities remain to be important problems in low-power design and fault analysis. A probabilistic Bayesian Network based switching model can ...
Shiva Shankar Ramani, Sanjukta Bhanja
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
14 years 2 months ago
Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
Simona Doboli, Gaurav Gothoskar, Alex Doboli